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| Ordering number : EN8321A Monolithic Digital IC LB11600JV Overview Brushless Motor Predriver IC for Automotive Applications The LB11600JV is a direct PWM drive predriver IC appropriate for 3-phase power brushless motors in automotive applications. This IC can implement either high side PWM drive or low side PWM drive motor driver circuits depending on the configuration of the output circuits, which use discrete transistors such as MOSFETs or bipolar transistors. In addition to a full complement of protection functions, including overcurrent, thermal, motor constraint, and undervoltage protection, the LB11600JV also provides an integrated speed control function. Thus the LB11600JV can implement high reliability/high functionality drive circuits. Functions * Three-phase bipolar drive (UH, VH, and WH pins, PWM control) * Forward/reverse switching circuit * Overcurrent protection circuit * Undervoltage protection circuit * Motor constraint protection circuit * Thermal protection circuit * Speed control circuit Applications Specifications Absolute Maximum Ratings at Ta = 25C Parameter Supply voltage Output Circuit current Allowable power dissipation Operating temperature Storage temperature Symbol VCC max IO max Pd max Topr Tstg VCC Pin UL, VL, WL, UH, VH, and WH pins Independent IC Conditions Rated value 14.5 40 0.5 -40 to 100 -55 to 150 Unit V mA W C C Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. D2706 MS IM 20060831-S00005 / 92706 / D0205 MH OT B8-8935 No.8321-1/30 LB11600JV Allowable Operating Ranges at Ta = 25C Parameter VCC voltage supply voltage range Output current RF pin voltage HP pin voltage HP pin voltage Symbol VCC VCC op VRF VHP IHP VCC Pin UL, VL, WL, UH, VH, and WH pins Conditions Rated value 4.5 to 14 30 0 to 3 0 to 14 0 to 10 Unit V mA V V mA Electrical Characteristics at Ta = 25C, VCC = 5V Parameter Current drain 1 Current drain 2 Output Block Output voltage 1-1 Output voltage 1-2 Output voltage 2 Hall Amplifier Block Input bias current Common-mode input voltage range 1 Common-mode input voltage range 2 Hall input sensitivity Hysteresis Input voltage (low high) Input voltage (high low) TOC Pin Input voltage 1 Input voltage 2 Input voltage 1L Input voltage 2L Input voltage 1H Input voltage 2H CTL Pin Input offset voltage Input bias current Common-mode input voltage range High-level output voltage Low-level output voltage PWM Oscillator (PWM pin) High-level output voltage Low-level output voltage External capacitor charge current Oscillator frequency Amplitude HP Pin Output saturation voltage Output leakage current VHPL IHPleak IO = 7mA VO = 13.5V 0.15 0.5 10 V A F (PWM) Vp-p (PWM) C = 1000pF 20 1.25 25 1.65 30 2.05 kHz VP-P VOH (PWM) VOL (PWM) 1CHG PWM = 2.1V 2.75 1.2 -60 3.0 1.35 -45 3.25 1.5 -30 V V A VOH (CONT) VOL (CONT) ITOC = -0.2mA ITOC = 0.2mA VCC-1.1 VCC-0.8 0.8 1.1 V V VIO (CONT) IB (CONT) VICM -10 -1 0 10 1 VCC-1.7 mV A V VTOC1 VTOC2 VTOC1L VTOC2L VTOC1H VTOC2H Output duty: 100% Output duty: 0% When VCC = 4.7V Output duty: 100% When VCC = 4.7V, Output duty: 0% When VCC = 5.3V, Output duty: 100% When VCC = 5.3V, Output duty: 0% 2.72 1.15 2.5 1.05 2.88 1.17 3.0 1.35 2.80 1.24 3.20 1.38 3.30 1.55 3.1 1.43 3.52 1.59 V V V V V V VIN (HA) VSLH (HA) VSHL (HA) VICM2 When a single-sided input bias is used (Hall IC applications) 80 15 5 -20 24 12 -12 40 20 -5 mVP-P mV mV mV 0 VCC V IHB (HA) VICM1 When a Hall effect element is used -2 0.5 -0.5 VCC-2.0 A V VOUT1-1 VOUT1-2 VOUT2 Low level, IO = 400A Low level, IO = 10mA High level, IO = -20mA VCC-1.1 0.1 0.8 VCC-0.9 0.3 1.1 V V V Symbol ICC1 ICC2 S/S = 0V Stop mode, S/S = 5V Conditions Min. 13 1.5 Rated value Typ. 20 2.5 Max. 27 3.5 mA mA Unit Continued on next page. No.8321-2/30 LB11600JV Continued from preceding page. Parameter Symbol Conditions Min. Motor Constraint Protection Circuit Block (CSD and CSET pins) CSD saturation voltage CSD off voltage CSD voltage CSET pin current CSET pin on voltage CSET pin off voltage Current Limiter Circuit (RF pin) Limiter voltage RFGND pin current Undervoltage Protection Circuit Operating voltage Release voltage Hysteresis VSDL VSDH VSD 3.6 4.1 0.35 3.8 4.3 0.5 4.0 4.5 0.65 V V V VRF IRFGND RFGND = 0V 0.216 -60 0.24 -40 0.264 -20 V A VSCSD VCSDOF VCSD ICSET VCSETON VCSETOFF CSET = 4.9V CSET = 4.8V VCC - CSET pin VCC - CSET pin 0.6 I0 = -0.5mA, VCC-VCSD 0.55 4.7 35 0.1 0.6 4.9 50 0.1 0.7 65 0.3 0.85 0.3 0.65 V V V A V V Rated value Typ. Max. Unit Thermal Shutdown Circuit (thermal protection circuit) Thermal shutdown temperature Hysteresis CEG Pin CEG pin current CEG pin on voltage CEG pin off voltage CR Pin High-level output voltage Low-level output voltage Clamp voltage FV Pin Charge current Discharge current FV pin high-level voltage FV pin low-level voltage S/S Pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current F/R Pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current VIH (FR) VIL (FR) VIO (FR) VIS (FR) IIH (FR) IIL (FR) F/R = 5V F/R = 0V VCC-0.5 0.2 -10 -130 0.3 0 -96 2.0 1.0 VCC 0.4 10 V V V V A A VIH(SS) VIL(SS) VIO(SS) VIS(SS) IIH(SS) IIL(SS) S/S = 5V S/S = 0V VCC-0.5 0.2 -10 -130 0.3 0 -96 2.0 1.0 VCC 0.4 10 V V V V A A ICHG1 ICHG2 VOFVH VOFVL FV = 2.5V FV = 1V IO = -200A IO = 200A -420 1.3 4.7 -300 2.5 4.9 0.15 0.3 -230 5.0 A mA V V VOH (CR) VOL (CR) VCLP (CR) 3.12 0.67 1.3 3.4 0.75 1.45 3.68 0.83 1.6 V V V ICEG VCEGON VCEGOFF CEG = 4.8V VCC - CSET pin VCC - CSET pin 0.6 35 50 0.1 0.7 65 0.3 0.85 A V V TSD Design target value (junction temperature)* 25 C TSD Design target value (junction temperature)* 150 170 C *: These are design target value and are not tested. Continued on next page. No.8321-3/30 LB11600JV Continued from preceding page. Parameter PWMIN Pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current Input frequency PWMRE Pin PWMRE pin current Threshold voltage Hysteresis IPWMIRE PWMRETH PWMREHYS PWMRE = 0V -260 1.12 0.44 -200 1.25 0.7 -140 1.38 1.1 A V V VIH (PWMIN) VIL (PWMIN) VIO (PWMIN) VIS (PWMIN) IIH (PWMIN) IIL (PWMIN) F (PWMIN) PWMIN = 5V PWMIN = 0V VCC-0.5 0.2 -10 -130 0.3 0 -96 50 2.0 1.0 VCC 0.4 10 V V V V A A kHz Symbol Conditions Min. Rated value Typ. Max. Unit Package Dimensions unit : mm (typ) 3191B 9.75 30 16 5.6 7.6 1 0.65 (0.33) 0.22 15 0.15 SANYO : SSOP30(275mil) Pin Assignment WL 30 WH 29 RF 28 RFGND GND 27 26 S/S 25 VCC 24 PWMIN PWMRE CSET 23 22 21 CSD 20 PWM 19 TOC 18 CTL17 CTL+ 16 0.1 (1.3) 1.5max 1 VH 2 VL 3 UH 4 UL 5 IN1+ 6 IN1- 0.5 LB11600JV 7 IN2+ 8 IN2- 9 IN3+ 10 IN3- 11 F/R 12 HP 13 CEG 14 CR 15 FV Top view No.8321-4/30 LB11600JV Block Diagram and Application Circuit 1 : MOS transistor drive (low side PWM), speed control feedback application No.8321-5/30 LB11600JV Application Circuit 2: Bipolar transistor (high side PWM) No.8321-6/30 LB11600JV Truth Table * Three-Phase Logic Truth Table (IN = H means that the input is in the IN+ > IN- state.) F/R=[L] IN1 1 2 3 4 5 6 H H H L L L IN2 L L H H H L IN3 H L L L H H IN1 L L L H H H F/R=[H] IN2 H H L L L H IN3 L H H H L L PWM VH WH WH UH UH VH Output Fixed UL UL VL VL WL WL When F/R is low, the IC recognizes the states where the Hall inputs in the above table occur in the order 1 6 as forward rotation, and the reverse order as reverse rotation. When F/R is high, the IC recognizes the states where the Hall inputs in the above table occur in the order 6 1 as forward rotation, and the reverse order as reverse rotation. * S/S Pin Input state High or open L Operating state Stop state Start state If the S/S pin is not used, the input must be held at the low-level voltage. No.8321-7/30 LB11600JV Pin Functions Pin Number 1 2 3 4 29 30 Function VH VL UH UL WH WL Function Outputs. These are push-pull outputs. Duty control is applied to the UH, VH, and WH pins. Internal 50k leakage protection resistors between the outputs and ground are provided to protect against output leakage in standby mode. Equivalent circuit VCC UH, VH, WH 1 50k 2 3 29 4 30 UL, VL, WL 5 6 7 8 9 10 IN1+ IN1IN2+ IN2IN3+ IN3- Hall effect sensor inputs from each motor phase. The logic high state corresponds to the state where IN+ > IN-. If input is provided from a Hall IC, the common mode input range can be expanded by biasing either the + or - input. VCC IN+ 579 300 300 6 IN8 10 11 F/R Forward/reverse switching input. VCC 50k 3.5k F/R 11 12 HP Hall signal single-phase output. (This pin is an open-collector output.) This pin outputs a signal that is inverted from the signal formed from the IN3 input. VCC HP 12 13 CEG Rotation pulse edge detection input. (This input is used by the one-shot multivibrator circuit.) Insert a capacitor between this pin and VCC. VCC 24 VCC CEG 13 300 Continued on next page. No.8321-8/30 LB11600JV Continued from preceding page. Pin Number 14 Function CR Function One-shot multivibrator pulse width setting. Insert a resistor between this pin and VCC and a capacitor between this pin and ground. If unused: short to ground. Equivalent circuit VCC VCC 24 CR 300 14 15 FV Hall signal one-shot multivibrator output. If unused: leave open. VCC FV 15 300 16 17 CTL+ CTL- CTL+: Control voltage input (Integrating amplifier noninverting input) CTL-: Control voltage input (Integrating amplifier inverting input) VCC CTL+ 16 300 300 CTL17 18 TOC PWM waveform comparator (Integrating amplifier output) VCC TOC 18 300 40k 38 38 No.8321-9/30 PWM pin Continued on next page. LB11600JV Continued from preceding page. Pin Number 19 Function PWM Function PWM oscillator frequency setting. Insert a capacitor between this pin and ground. Equivalent circuit VCC 200 2k PWM 19 20 CSD Motor constraint protection detection sense input. Insert a capacitor between this pin and VCC and a resistor between this pin and ground. VCC VCC 24 300 CSD 20 21 CSET Motor constraint protection circuit rotation input pulse detection. Insert a capacitor between this pin and VCC. VCC 24 VCC CSET 21 300 22 PWMRE PWM input reset. Insert a resistor and a capacitor between this pin and ground. VCC 300 PWMRE 22 23 PWMIN External PWM input. When the input is low, the out put will be in the drive state and when the input is high or open, the output will be off. VCC 50k 3.5k PWMIN 23 Continued on next page. No.8321-10/30 LB11600JV Continued from preceding page. Pin Number 24 25 Function VCC S/S Function VCC power supply connection. Start/stop control. A low level sets the IC to the start state and a high level or open sets it to the stop state. Equivalent circuit VCC 50k S/S 3.5k 25 26 27 28 GND RFGND RF Ground connection RFGND: Output current detection circuit comparator reference ground. RF: Output current detection. Insert a resistor with a low resistance between the RF pin and ground. The maximum output current is set to IOUT = 0.24/RF by the resistor RF. VCC RFGND 27 6k 5k RF 28 No.8321-11/30 LB11600JV Timing Charts (Hall input/output, startup, input off state, and constraint protection timing charts) F/R = "L" IN1 Forward IN2 IN3 UH VH WH UL VL WL F/R = "H" Forward IN1 IN2 IN3 UH VH WH UL VL WL The gray areas indicate PWM output. No.8321-12/30 LB11600JV Startup Timing Chart (When a buffered input is provided to CTL+) 5V VCC TOC PWM The PWM and TOC duty signal 0.7V PWMIN 0V 4.9V PWMRE PWMRE VthH=1.25V PWMRE(OFF)VthL=0.5V Hysteresis = 0.7V Trset 4.9V CSD 3.8V or higher - Rapid charging off. Output on 4.2V UH (When the output is on.) No.8321-13/30 LB11600JV Startup Timing Chart (When the PWMIN input is used) 5V VCC TOC PWM The PWM and TOC duty signal 0.7V 5V PWMIN 4.9V PWMRE PWMRE VthH=1.25V PWMRE(OFF)VthL=0.5V Hysteresis = 0.7V Trset 4.9V CSD 3.8V or higher - Rapid charging off. Output on 4.2V UH (When the output is on.) No.8321-14/30 LB11600JV Input Off State (CTL+input) Reset Operation Timing Chart 5V VCC PWM TOC The PWM and TOC duty signal 0.7V PWMIN 0V 4.9V PWMRE PWMRE VthH = 1.25V PWMRE (OFF) VthL = 0.5V Hysteresis = 0.7V Toff 4.9V CSD Constraint protection Vth = 0.6V Output off 4.2V UH (When the output is on.) No.8321-15/30 LB11600JV Input Off State (PWMIN input) Reset Operation Timing Chart 5V VCC TOC PWM The PWM and TOC duty signal 0.7V PWMIN 0V 4.9V PWMRE PWMRE VthH = 1.25V PWMRE (OFF) VthL = 0.5V Hysteresis = 0.7V Toff 4.9V CSD Constraint protection Vth = 0.6V Output off UH (When the output is on.) 4.2V No.8321-16/30 LB11600JV Constraint Protection State Latch Release Timing Chart (CLT+ input) 5V VCC PWM TOC The PWM and TOC duty signal 0.7V PWMIN 0V 4.9V PWMRE PWMRE VthH = 1.25V PWMRE (OFF) VthL = 0.5V Hysteresis = 0.7V Toff Tchg 4.9V Tchg: CSD voltage rise time Constraint protection Vth = 0.6V Torc Torc: Output off latch state CSD Latch released UH (When the output is on.) 4.2V Constraint protection operation (output off) No.8321-17/30 LB11600JV Constraint Protection Timing Chart No.8321-18/30 LB11600JV LB11600JV Application Circuit Diagram (FET driver: low side PWM control) VM 10F 1000pF 1000pF 1000pF 1k 1k 1k 680 680 680 0.055 (2W) UH 1k 200 1k VL 200 1k WL 0.033F CR 14 *: The resistor, capacitor, and transistor values shown are for reference purposes only. The values used in an application will depend on the motor used and the control specifications. UL 200 WH VH VH 1 VL 2 UH 3 UL 4 IN1+ 5 IN16 IN2+ 7 IN28 IN3+ 9 IN310 F/R 11 30 WL 29 WH 28 RF 27 26 RFGND GND 25 S/S 5V 23 22 21 24 VCC PWMIN PWMRE CSET LB11600JV 10F 3300pF 0.022F 200k 33F 150k 20 CSD 51k 3300pF 19 PWM HP 12 CEG 13 FV 15 Top view 1000pF 18 TOC 17 CTL- 100k 16 CTL+ ILB01741 No.8321-19/30 LB11600JV LB11600JV Operation 1. Output Drive Circuit The LB11600JV adopts direct PWM drive to minimize power loss in the output system. The output transistors are always saturated when on and the motor drive power is adjusted by changing the output on duty. Output PWM switching is applied the UH, VH, and WH output side circuits. Since the UL to WL and UH to WH outputs have the same output configuration, either low side PWM or high side PWM drive can be implemented by using appropriate circuit structures with the external output drive transistors. Since the reverse recovery time for the diodes connected to the non-PWM side outputs can be a problem, care is required in selecting these diodes. (If diodes with a short reverse recovery time are not used, through currents will flow at the instant the PWM side transistors are turned on.) The UL to WL and UH to WH outputs go to the high-impedance state in the stopped state and when the supply voltage is extremely low (i.e. lower than the allowable operating voltage). This means that workarounds (such as pull-down resistors) are required so that leakage currents and other phenomenon do not cause incorrect operation in external circuits. 2. Power Saving Circuit The LB11600JV goes to a power saving state in which power consumption is reduced when the S/S pin is set to the high level. The power saving state cuts off the bias current from most of the circuits in the IC. 3. Notes on the PWM Frequency The PWM frequency is set by the capacitance of the capacitor (C) connected to the PWM pin. The formula for calculating the PWM frequency is shown below. T2 V2 V1 T1 Formula (When VCC = 5V (typical)) Oscillator period: T = T1 + T2 (s) Threshold voltage: V1 = 0.25 x VCC + 0.0975 = 1.35 (V) V2 = 0.6 x VCC = 3.0V (V) Charge time: T1 = C x (V2 - V1)/IC (s) IC: Charge current provided by the PWM pin: 45A Discharge time: T2 = - C x Rin x ln (V1/V2) (s) Rin: PWM pin internal discharge resistor (2k) C: External capacitor Oscillator frequency: Fpwm = 1/T (Hz) If a 1000pF capacitor is used, the oscillator frequency will be about 25kHz. If the PWM frequency is too low, the motor may emit audible switching noise, and if it is too high, power loss in the output circuits will be excessive. We recommend using a frequency in the range 15 to 50kHz. Connect the ground side of the external capacitor as close as possible to the IC GND pin to minimize the influence of output noise and other problems. No.8321-20/30 LB11600JV 4. Notes on PWM Drive Methods The output duty can be controlled by any of the following methods. * Control by Comparing the TOC Pin Voltage with the PWM Oscillator Waveform This method sets the UH, VH, and WH output duty by comparing the TOC pin voltage with the PWM oscillator waveform. When the TOC pin voltage falls below 1.35V (typical), the duty will be 0%, and when it rises above 3.0V (typical), the duty will be 100%. Since the TOC pin is the control amplifier's output pin, it is not possible to directly input a control voltage to the TOC pin. Therefore, the control amplifier is normally used as a buffer amplifier (by connecting the CTL- pin to the TOC pin) and inputting a DC voltage to the CTL+ pin. (This causes the TOC pin voltage to become the same as the CTL+ pin voltage.) In this case, the output duty will increase as the CTL+ pin voltage becomes higher. Since the motor will be driven if the CTL+ pin is in the open state, a pull-down resistor must be connected to the CTL+ pin if it is not desirable to drive the motor when the input is in the open state. If the CTL+ pin is used for motor control, set the PWMIN pin to the low level or short it to ground. * Pulse Control Using the PWMIN Pin A pulse input can be applied to the PWMIN pin and the duty of that signal used to To the control the output. PWMIN pin When a low-level input voltage is applied to the PWMIN pin the output will be on, and when a high-level input voltage is applied the output will be off. When the PWMIN pin is open, it goes to the high level and the output will be turned off. If the inverse input logic is required, use an external npn transistor as shown in the figure. If the PWMIN pin is used for control, connect the CTL- pin to ground and connect the CTL- pin to the TOC pin. A 1000pF capacitor must be connected to the PWM pin even when the PWMIN pin is used for control. Pulse input * PWMRE Pin Input Pulse Reset To prevent incorrect operation of the constraint protection circuit when the VCC power supply is started or when the motor is stopped (the constraint protection circuit will operate immediately if the CSD pin potential is low), that is to assure that the CSD pin is set to the high-level voltage reliably (by assuring the capacitor charge time), a reset period (outputs off, the rapid charge time for the CSD pin) is set up by a resistor and capacitor connected to the PWMRE pin. When the motor is controlled by either the CTL+ pin or by pulses input to the PWMIN pin, output to the motor is not provided immediately. Rather the output remains in the off state (the reset period) until the charge/discharge potential due to the on/off operation set by the input pulse duty width, the PWMRE pin charge current, and the capacitor and resistor connected to the PWMRE pin rises above 1.25V (typical). The IC enters operating mode when the PWMRE potential is over 1.25V (typical), and the output goes to the off state (reset state) when the PWMRE potential falls below 0.55V (typical) in the input pulse off state. The IC operates with the outputs on (UH, VH, and WH), when the PWMRE potential is over 1.25V (typical) and the CSD pin potential is over 0.76 x VCC (3.8V typical when VCC = 5V). See the timing chart for startup and the input off state. The formula for setting the reset time (Trest) and the timing charts are shown on the following pages. No.8321-21/30 LB11600JV The time (n times the PWMIN period) required for the potential, which is increased by the V2 potential difference (V) on each input pulse, to exceed the threshold voltage (Vth = 1.25V) is the reset period (Trest). V2 + V + V 1.25V Trest TPWMIN x n (s) No.8321-22/30 LB11600JV PWMRE Timing Chart for PWMIN Pin Input TOC PWM t2 PWMIN 5V t1 4.9V PWMRE PWMRE VthH=1.25V V1 V0 PWMRE(OFF)VthL=0.5V Hysteresis = 0.7V V V2 V Trset 4.9V CSD 3.8V or higher - Rapid charging off. Output on UH (When the output is on.) 4.2V No.8321-23/30 LB11600JV No.8321-24/30 LB11600JV PWMRE Timing Chart for CTL+ Buffered Input (1) CTL+ input mode (When the TOC potential is high due to the rise of the PWM triangle wave) TOC PWM t1 The PWM and TOC duty signal 0.7V PWMIN t2 0V 4.9V PWMRE Tpwmra V1 PWMRE VthH=1.25V V2 PWMRE(OFF)VthL=0.5V V0 Trset Hysteresis = 0.7V CSD 4.9V 3.8V or higher - Rapid charging off. Output on 4.2V UH (When the output is on.) No.8321-25/30 LB11600JV PWMRE Timing Chart for CTL+ Buffered Input (2) CTL+ input mode (When the TOC potential rises after the rise of the PWM triangle wave) TOC PWM The PWM and TOC duty signal T1 t3 t5 0.7V t2 PWMIN t4 0V 4.9V PWMRE V5 V1 V0 V0 Trset V2 V3 V4 PWMRE VthH=1.25V PWMRE(OFF)VthL=0.5V Hysteresis = 0.7V 4.9V CSD 3.8V or higher - Rapid charging off. Output on 4.2V UH (When the output is on.) No.8321-26/30 LB11600JV 5. Hall Input Signals The Hall effect sensor inputs require input signals with an amplitude larger than the hysteresis (80mV maximum) and an even larger amplitude is desirable to avoid problems due to noise, phase displacement, and other issues. If disturbances to the output waveforms (at phase switching) or HP output occur due to noise, the disturbances must be prevented by inserting capacitors across the inputs or by other means. The Hall inputs are used as input discrimination signals to the constraint protection circuit and the one-shot multivibrator circuit. Although these circuits are designed to tolerate a certain amount of noise, care is required if these protection circuits are used. If all three phases of the Hall input signals go to the same state, all of the outputs will be turned off (all of the UL, VL, WL, UH, VH, and WH outputs will go to the low level potential). If the outputs from a Hall IC are used for these inputs, tying one side of the inputs (either the + or - side) to a voltage within the common-mode input range for when Hall sensors are used allows the other side of the input to be used with an input in the 0 to VCC range. 6. Undervoltage Protection Circuit This IC starts up (output operation turns on) at a VCC voltage of 4.3V (typical) and turns the outputs off (sets the UH, VH, and WH outputs to the low level potential) when the VCC voltage falls to under 3.8V(typical). 7. Constraint Protection Circuit The LB11600JV includes a constraint protection circuit to protect the motor and the IC itself when the motor is physically prevented from turning. If the Hall input signals do not change for a certain fixed period when the IC is operating in the motor drive state, one side of the output system (the UH, VH, and WH outputs) is turned off. The time is set by the discharge time of the resistor and capacitor connected to the CSD pin. (See the constraint protection circuit timing chart.) The motor rotation pulse detection signal is detected with the timing of the fall (high to low) of the UH output signal, one of the three output phases. The rotation pulse detection signal time is set by the discharge time for the CSET pin capacitor. During motor rotation, the CSD pin potential will always be high during the rotation pulse detection time. If the motor becomes constrained (stopped), the CSD potential is discharged and the outputs (UH, VH, and WH) are set low when the CSP potential falls under 0.6V. After the constraint protection circuit operates, the outputs will be latched in the low state. To clear this latched state, set either PWMIN or S/S to the high level. The latched state is cleared when the PWMRE potential falls below 0.55V (typical) and the IC enters the reset state. (See the latch clear timing chart.) Note that if the CSD pin resistor Rc is too large, the CSD pin potential may rise due to the bias current from the internal comparator circuit. Rotation pulse detection signal time: Tps = Cs x VBE / Icset (s) Cs: CSET pin external capacitor (connected between VCC and CSET) VBE: VBE for the transistor in the constraint protection circuit: 0.7V (typical) Lcset: CSET pin discharge current: 50A (typical) Motor constraint time: Tcsd = ln (VCC / (0.6 - Ibcd x Rc) x Cc x Rc (s) Cc: CSD pin external capacitor (connected between VCC and CSD) Rc: CSD pin external resistor (connected between the CSD pin and ground) Ibcd: CSD pin internal comparator bias current: 1A (typical) CSD pin discharge potential threshold voltage: 0.6V (typical) Latch release time: Toff = ln (VCC / 0.55) x Cre x Rre (s) Cre: PWMRE pin external capacitor (connected between the PWMRE pin and ground) Rre: PWMRE pin external resistor (connected between the PWMRE pin and ground) CSD potential rise time (rapid charging time): Tchg Cc x Rc x ln ((V1 - Ic x Rc) / (V2 - Ic x Rc)) (s) Cc: CSD pin external capacitor (connected between VCC and CSD) Rc: CSD pin external resistor (connected between the CSD pin and ground) Ic: CSD pin transistor current (7mA maximum (design target value)) V1: CSD pin initial voltage V2: CSD pin voltage (when the transistor is in the on state): 4.9V (typical) No.8321-27/30 LB11600JV CSD voltage rise time (during motor rotation): Tchg Cc x Rc x ln((V1 - Ic x Rc) / (V2 - Ic x Rc)) (s) Cc: CSD pin external capacitor (connected between VCC and CSD) Rc: CSD pin external resistor (connected between the CSD pin and ground) Ic: CSD pin transistor current (3.5mA maximum (design target value)) V1: CSD pin initial voltage V2: CSD pin voltage (when the transistor is in the on state): 4.9V (typical) IN3+ input IN3- HP pin No.8321-28/30 LB11600JV 12. One-Shot Multivibrator Circuit Block (CEG, CR, and FV pins) The LB11600JV includes a built-in one-shot multivibrator circuit to allow it to support speed feedback control. The signal used for speed control is a rotation pulse detection signal that is created in the CEG pin circuit block with the timing of the fall (high to low) of the UH output signal, one of the three output phases. The LB11600JV detects the rotation period from this signal. The rotation pulse detection signal time is set by the discharge time of the capacitor connected to the CEG pin. Rotation pulse detection signal time: Tps = Ce x VBE/Iceg (s) Ce: CEG pin external capacitor (connected between VCC and CEG) VBE: VBE for the transistor in the CEG edge detection circuit: 0.7V (typical) Iceg: CSET pin discharge current: 50A (typical) The CR pin sets the pulse width (high period) generated at the FV pin at each signal from the CEG pin. The pulse width is set by connecting a resistor and a capacitor between the CR pin CR pin and VCC and ground, respectively. The pulse width TRC can be calculated approximately with the following formula. TRC 1.1 x R x C (s) Normally, a smoothing circuit consisting of a resistor and capacitor as shown in the figure is connected to the FV pin. A resistor with a value of at least 25k must be selected. The value of the capacitor must be selected so that adequate smoothing of FV pin the FV voltage is provided when the motor speed is low. Normally, this circuit is set up so that the following relationship holds when fUH (Hz) is the UH output frequency at the highest motor speed. TRC 1/(2 x fUH) (s) In this case, the FV voltage will change from 0 to about 5V according to the motor speed. If the FV output is not used, connect the CR pin to ground and leave the FV pin open. To the VCC pin R C FV voltage 13. Power Supply Stabilization Since the LB11600JV adopts a switching-based drive method, the power supply line level is easily disturbed. Therefore it is necessary to connect a capacitor with adequate capacitance to stabilize the power supply between the VCC pin and ground. If diodes are inserted in the power supply lines to prevent damage if the power supply is inadvertently connected with reverse polarity, the power supply line will be even more sensitive to disruption. Here, an even larger capacitance must be provided. If the switch and the capacitor are widely separated when the power supply is turned on and off, such as during switching, the supply voltage may swing widely due to the surge current between the line inductance and the capacitor. Voltages that exceed the LB11600JV's voltage handling capacity may occur. In applications such as this, do not use components, such as ceramic capacitors, which have a low capacitor series impedance, but rather use electrolytic capacitors and implement measures to minimize the surge current and prevent voltage increases. No.8321-29/30 LB11600JV Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 2006. Specifications and information herein are subject to change without notice. PS No.8321-30/30 |
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